Hi
Is there a behavioral simulation model available for this part, or something like it?
We have a customer asking us to interface our RapidIO IP core to this device in an FPGA.
Thanks
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Hi
Is there a behavioral simulation model available for this part, or something like it?
We have a customer asking us to interface our RapidIO IP core to this device in an FPGA.
Thanks
Kent,
I have attached the verilog model for the TLK3101. Hopefully you will be able to use this model.
Regards,
Atul Patel
Texas Instruments
Hi Atul
The model does not appear to be attached, or am I missing something?
Thanks,
Kent
Kent,
The model should be attached to this post.
Thanks,
-Atul