Other Parts Discussed in Thread: DS90UB941AS-Q1
Hi,
Is it possible for D_GPIO[3:0] signals going from 941 TX port 1 to 926 GPIO[3:0]?
the block diagram is shown below.
Best regards,
Shubiao Wang
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Hi,
Is it possible for D_GPIO[3:0] signals going from 941 TX port 1 to 926 GPIO[3:0]?
the block diagram is shown below.
Best regards,
Shubiao Wang
Hi Shubiao,
The GPIOs mapping are fixed for 92x and 94x devices. The GPIO[0:3] of the 926 maps to GPIO[0:3] of the 941AS. This due to the GPIOs is assigned to PORT0 and D_GPIOs is assigned to PORT1. Therefore, you can't have them interchange.
Aaron
Hi Aaron,
Below is what I found in the app note, "splitter mode operation with ds90ub941as-q1",https://www.ti.com/lit/an/snla308/snla308.pdf?ts=1597200393896&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FDS90UB941AS-Q1%253FkeyMatch%253DDS90UB941%2526tisearch%253DSearch-EN-everything%2526usecase%253DGPN
In this block diagram, a 94x port 0, GPIO[0:3] is connected to 941 port 1. Why 94x GPIO could be mapped to 941 DGPIO?
BRs,Shubiao
Hi Shubiao,
Like I mentioned on the previous posted. The GPIO physical mapping is fixed, which mean you can't connect D_GPIOs to normal GPIOs. So, if you want to use D_GPIOs on the 941AS, you must use the D_GPIOs pin on deserializer side. I will look into this if I can map this.
Aaron
Hi Shubiao,
I reviewed and investigated on your diagram. Based on your diagram, the GPIO should work. When 941AS device is in a splitter mode or independent mode of operation, the first link use normal GPIOs where the second link use the D_GPIOs. This will map to 926 GPIO since 926 operates in single port only. It just is connected to the 2nd port on the 941AS.
Hope this helps. Let me know if you have further questions.
Aaron
Hi Aaron,
Thanks for your updates.
It is appreciated if you could have an experiment for this case or double-check with the designer. We need your double confirm to move forward since this question has blocked the progress of the project.
BRs,
Shubiao Wang