TMDS181: TMDS181 EYE Pattern

user1288973

Part Number: TMDS181

Hi Sir,

I am adjusting the HDMI1.4 4k30p EYE pattern with TMDS181.

In the HW setting, EQ_SEL=Adaptive EQ, PRE_SEL=L,
When Vsadj=5.3kOhm, the level passed the compliance test.
However, I want to expand EYE a little more because the EYE pattern is at the limit.

In the HW setting, EQ_SEL=Adaptive EQ, PRE_SEL=L,
When Vsadj=3.6kOhm, EYE spread, but
CTS.7-2 VL level becomes low and it fails.

Isn't there a good way to keep VL level while spreading EYE?

Although detailed measurement data is condifential information, it is shared with TI Japan, so please contact TI Japan.

over 5 years ago

0 David (ASIC) Liu over 5 years ago

TI__Guru**** 177301 points

Hi,

Can you contact TI Japan and ask them to send me the schematic, the layout, and the compliance report?

Have you tried to set the PRE_SEL = H while keep Vsadj = 5.3k?

Thanks

David

0 user1288973 over 5 years ago in reply to David (ASIC) Liu

Intellectual 260 points

Hello, David.

I shared the schematic to TI Japan.

PRE_SEL = H is Reserved, so it is not set.
PRE_SEL = NC was Fail.

0 David (ASIC) Liu over 5 years ago in reply to user1288973

TI__Guru**** 177301 points

Hi,

I received the compliance report.

Something does not look right, why would lower VSADJ resistors results in lower signal amplitude? Lowing the VSADJ resistor would increase the signal amplitude. Would you please check the VSADJ resistor value?

Thanks

David

0 user1288973 over 5 years ago in reply to David (ASIC) Liu

Intellectual 260 points

Hi, David,

The sent report has larger amplitude at Vsadj=3.6k than at Vsadj=5.3k.
Please check carefully.

0 David (ASIC) Liu over 5 years ago in reply to user1288973

TI__Guru**** 177301 points

Hi,

In the compliance report, it shows low amplitude for CK+ is 2.3614V for VSADJ of 3.6k and 2.5975V for VSADJ of 5.3k. The remaining data all shows the amplitude is higher at 5.3k than the amplitude at 3.6k.

What is the TX_TERM_CTL being set to? Is it being set to NC?

Is it possible to have the actual layout for review?

Thanks

David

0 user1288973 over 5 years ago in reply to David (ASIC) Liu

Intellectual 260 points

Hi, David

Indeed, the single-ended amplitude is lower at 3.6k, but the differential amplitude is greater at 3.6k. Look at the EYE waveform.
Also, TX_TERM_CTL is set to NC.

0 David (ASIC) Liu over 5 years ago in reply to user1288973

TI__Guru**** 177301 points

Hi,

Is it possible that you can remove the common mode choke and the ESD components and measure the signal amplitude again?

Thanks

David

0 user1288973 over 5 years ago in reply to David (ASIC) Liu

Intellectual 260 points

Hi, David

EYE closed when I removed the ESD components.
The common mode choke coil could not be removed, but if it is loosened, EYE will open, but VL will be smaller.
Since VL is the amplitude from 3.3V to the low level, if EYE is opened, I think VL becomes small in the first place.

0 David (ASIC) Liu over 5 years ago in reply to user1288973

TI__Guru**** 177301 points

Hi,

Is it possible that you can send me a board for testing? Can I also get the layout for review?

Thanks

David

0 user1288973 over 5 years ago in reply to David (ASIC) Liu

Intellectual 260 points

Since the function is not only HDMI, I can not send the board.
The layout has already been sent to TI Japan.

0 David (ASIC) Liu over 5 years ago in reply to user1288973

TI__Guru**** 177301 points

Hi,

Is it possible to get the actual board file? The board file was pasted into the Excel and I can't effectively review it.

At this moment, without the actual board or the board file, it is very hard for me to provide guide on how to improve the current test result.

Thanks

David

0 user1288973 over 5 years ago in reply to David (ASIC) Liu

Intellectual 260 points

Layout is difficult to cut out because it is combined with other circuits.

Also, the trend was the same when evaluated by EVM.
The single-ended high side is offset to a low voltage side instead of 3.3V, resulting in VL less than specified.
Decreasing Vsadj lowers the offset to a lower voltage.
Is this a characteristic of the IC?

0 David (ASIC) Liu over 5 years ago in reply to user1288973

TI__Guru**** 177301 points

Hi,

No, this is not what I would expect.

How do you test the EVM? Do you have the scope probe terminated to 3.3V?

Thanks

David

0 user1288973 over 5 years ago in reply to David (ASIC) Liu

Intellectual 260 points

The oscilloscope is terminated at 3.3V when measuring VL.
When Vsadj of EVM is set to a variable resistance and the resistance value is changed to the smaller one, it can be seen that the offset of VL becomes smaller.

0 David (ASIC) Liu over 5 years ago in reply to user1288973

TI__Guru**** 177301 points

Hi,

Please give me a day and let me verify it on a TMDS181 EVM.

Thanks

David

0 David (ASIC) Liu over 5 years ago in reply to David (ASIC) Liu

TI__Guru**** 177301 points

Hi,

For VL, I verified that we have to increase the Vsadj resistance. Increasing Vsadj will reduce the current being sunk by TMDS181, this will lead to a smaller voltage swing and produce higher Vl.

Thanks

David

0 user1288973 over 5 years ago in reply to David (ASIC) Liu

Intellectual 260 points

Hi, David.

Going back to the first question,
Is there a way to increase the differential amplitude while increasing Vl?
Increasing Vsadj increases VL but decreases the differential swing.

0 David (ASIC) Liu over 5 years ago in reply to user1288973

TI__Guru**** 177301 points

HI,

You are correct, increasing Vsadj would increase VL but reduce the differential amplitude. The key is to adjust the VSADJ resistor that can satisfy both the VL and differential amplitude requirement.

Thanks

David

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TMDS181: TMDS181 EYE Pattern