DP83867IR: Inquiry about xGMII Error Interrupt

Hi Michael,

I need more details to this question as I don't know what are the connections or how the PHY is used/ in what mode it is in. 

Can you review the troubleshooting guide to confirm that the design meets all these requirements?

https://www.ti.com/lit/an/snla246a/snla246a.pdf

Thanks,

Cecilia

Hi Cecilia,

First of all, thanks for your support.

I don't know well about mode what you asked.

Could you explain it to me?

I'll let you know about more test information and request.

Connected NVR Ethernet Switch and IP Network Camera (DP83867IR is mounted on IP Network Camera).

Speed is Gigabit.

And then, Turns on/off the power of the IP Network Camera periodically.

Ethernet link is failed between NVR Ethernet Switch and IP Network Camera sometimes.

When Ethernet link is failed, xGMII Error Interrupt was set to "1".

Otherwise xGMII Error Interrupt was set to "0".

As mentioned previously, Our customer really want to know it about below question.

Could you please give me your kind explain?

 -. What the case can make xGMII Error Interrupt to be set "1" ?

 -. What's the means of xGMII Error?

Best Regards,

Michael

Hi Michael,

Thank you for sharing the details. Can you please review the troubleshooting document and let me know if the schematic design has any issues?

The xGMII error could be due to the clock ppm difference between MAC and PHY.

Can you share whether the customer's design has the correct crystal specifications and PPM? I want to make sure there is no signal issue on the clock. You can also check the clock quality on the TX_CLK to confirm. 

Thanks,

Cecilia

Hi Cecilia,

Could you double check schematic and send me resolution?

Here is Clock ppm of MAC, PHY.

Below is actual test result on B'd.

 -. MAC Crystal Clock (SoC) : 24MHz / 3ppm

 -. PHY Crystal Clock : 25MHz / 17ppm

Below is Crystal Spec. Data

 -. MAC Crystal Clock (SoC)

 -. PHY Crystal Clock

Here is schematic

DP83867IR - PHY.pdf

Best Regards,

Michael

Hi Michael,

What is the MAC Clock used for? Is that being supplied to the PHY or just used for SMI?

Hi Cecilia,

I don't know well what your asked.

Could you please explain more detail?

For your information, MAC is integrated in their SoC IC.

As I mentioned, SoC use Crystal Clock = 24MHz. PHY use Crystal Clock = 25MHz.

If you see the schematic, they use  GTX_CLK of PHY.

Best Regards,

Michael

Michael,

My question is, are they using the TX_CLK from the MAC? Also have you confirmed that the clocks have the correct skew for TX_CLK and RX_CLK? 

Thanks,

Cecilia