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SN65HVS880: Will the device interpret high Z input

Part Number: SN65HVS880
For any of the inputs, if it is a floating node (for example when a switch is on, the input will receive 24V. If the switch is off, then it will be an open circuit) will the serializer interpret it as a logic low signal? Specifically, does it already have a pull down resistor for each input signal?
Nothing on the datasheet specifically says it will, but the application circuit on page 17 figure 23 shows a similar configuration. For S0 and S7, when the switch is open, the input to IP0 and IP7 respectively should be floating/high impedance. With the current limit on these IP inputs, will that not be enough to detect the floating/high impedance inputs as logic low?
  • Andrew,

    I wouldn't quite call it high-z but it will register low. The default state of the input signals is low. Basically, when an input signal is applied there are multiple signal checks that the signal must go through to give a low-to-high transition of the input state. 
    Is the signal above 5.2V (High-level device input threshold voltage), is the input current higher than the leakage threshold (half the current limit set using the Rlim), and will this signal duration be longer than the debounce filter time (configured with DB0 and DB1)? The signal must pass all of these conditions before the serializer will register the input states as a high. 

    Hope this helps,
    Rami Mooti