Hi,
The power-on reset errata is mentioned on page 29 of PCA9539 data sheet. So, are all internal state machines forced to defaults regardless of the power-on sequence if /RESET is asserted to low during the power-on and /RESET is de-asserted to high when the power supply voltage VCC is stable?
Or, should /RESET de-asserted twice as follows?
Best regards,
Kato