Other Parts Discussed in Thread: MSP430F5529, ,
Hello,
I am using MSP430F5529 launchpad to communicate with TCAN4550.
I am able to read registers 0x0000, 0x0004, 0x0008, 0x000C only and no other register
After TCAN4x5x_Device_ClearSPIERR(); on reading the next command I am not getting interrupts in 820 register but after that it gives 0x88 error byte.
These are my response on SDI and SDO pins. Also SPI communication works only when clock phase is set 1.
SDI 61 00 0C 01 FF FF FF FF
SDO 88 00 00 00 00 00 00 00
SDI 41 00 0C 01 FF FF FF FF
SDO 00 00 00 00 01 00 00 04
SDI 41 00 00 01 FF FF FF FF
SDO 88 00 00 00 4E 41 43 54
SDI 41 00 04 01 0F 0F 0F 0F
SDO 88 00 00 00 30 35 35 34
SDI 61 08 08 01 AB CD EF 12
SDO 88 00 00 00 00 00 00 00
SDI 41 08 08 01 0F 0F 0F 0F
SDO 88 00 00 00 00 00 00 00
SDI 41 08 20 01 0F 0F 0F 0F
SDO 88 00 00 00 00 00 00 00
* Status register ( 000C ) always gives 0x01000004
my code for setting SPI port.
UCA0CTL1 |= UCSWRST; // **Put state machine in reset**
UCA0CTL0 |= UCCKPH + UCMSB + UCMST + UCSYNC;
UCA0CTL1 |= UCSSEL_2; // SMCLK
UCA0BR0 |= 0x01; // /2
UCA0BR1 = 0; //
UCA0MCTL = 0; // No modulation must be cleared for SPI
UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine**
and code for clock
SetVcoreUp (0x01);
SetVcoreUp (0x02);
SetVcoreUp (0x03);
UCSCTL3 = SELREF_2; // Set DCO FLL reference = REFO
UCSCTL4 |= SELA_2; // Set ACLK = REFO
__bis_SR_register(SCG0); // Disable the FLL control loop
UCSCTL0 = 0x0000; // Set lowest possible DCOx, MODx
UCSCTL1 = DCORSEL_5; // Select DCO range 50MHz operation
UCSCTL2 = FLLD_0 + 303; // Set DCO Multiplier for 25MHz
// Set FLL Div = fDCOCLK/2
__bic_SR_register(SCG0); // Enable the FLL control loop
__delay_cycles(782000);
// Loop until XT1,XT2 & DCO stabilizes - In this case only DCO has to stabilize
do
{
UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + DCOFFG);
// Clear XT2,XT1,DCO fault flags
SFRIFG1 &= ~OFIFG; // Clear fault flags
}while (SFRIFG1&OFIFG); // Test oscillator fault flag
