DP83822H: DP83822H MDI terminating

Tsahi Tal

Part Number: DP83822H

1. on the EVM schematics, the terminations are connected to 3.3V, as well ass the center tap. how current is sourced to the tap in this kind of connection.

2. why this frvice uses CML IF? if I am right, most Ethernet copper devices utilized LVDS interface.

thanks

over 5 years ago

0 Cecilia Reyes over 5 years ago

TI__Genius 9920 points

Hi Tsahi,

The DP83822 is a current mode line driver which requires the external termination and bias network.

0 Tsahi Tal over 5 years ago in reply to Cecilia Reyes

Prodigy 160 points

1. why CML is used in this PHY, and why aren't terminations included in package?

2. what I/O standard is being used when connecting terminations to GND (like in most designs)

3.I am trying to figure out the current which flows via the transforemer. let's say that the CML driver uses 10mA current source. is current is sourced equally by the CT and the Vdd of CML termination?

thanks!!

0 Cecilia Reyes over 5 years ago in reply to Tsahi Tal

TI__Genius 9920 points

Hi Tsahi,

CML was the nature of the design for this device. If you are interested in other PHYs that are voltage mode line drivers that don't require termination you may refer to the others in our portfolio.

Can you share an example of what you mean when you say most designs with terminations?

0 Tsahi Tal over 5 years ago in reply to Cecilia Reyes

Prodigy 160 points

I am not an ASIC designer, but I read that LVDS was used for MDIs.

maybe i got confused because it is the first time that i see external MDI terminations which are connected to VDD.

Is it done internally on other PHY devices?

thanks!

0 Cecilia Reyes over 5 years ago in reply to Tsahi Tal

TI__Genius 9920 points

Hi Tsahi,

That is correct. We have some devices that terminate internally such as the DP83825 and DP83826. You can read more about it in their datasheets.

Thanks,

Cecilia

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DP83822H: DP83822H MDI terminating