Other Parts Discussed in Thread: TPS22916
Hi,
I am using DVI output interface. We are using digilent Zybo Z7 IP and directly obtaining TMDS signals from FPGA. I referred the schematics of ZYBO-Z7 and they have used TS3DV642 for reverse current flow protection. But TS3DV642 is a 1:2 Mux. So can you please suggest a DVI/HDMI buffer for reverse current flow protection.
Below is the link for Zybo-Z7 schematics. were TI IC is used.
I am looking for a IC that can prevent reverse current flow from display to FPGA when board is off and display is ON.
