Other Parts Discussed in Thread: DP83TD510L
Hi, a customer has questions on the data sheet DP83TD510L. On page 23 the RMII Low Power 5-MHz Mode is described. There it says that a 5 MHz clock signal is generated. On the block diagram 50 MHz are output at pin 1 (RX_D3).
Pin 1 is according to the data sheet DVDD?
RX_D3 is a Receive Data Signal?
How is the RMII Low Power 5-MHz Mode configured? (Automatically when RMII Master Mode is selected?)
Is there a more detailed description for the RMII Low Power 5-MHz Mode.
Thanks
Fred