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Hi Shifali,
Yes LMH0397 does support level A(3G data stream) and level B(multiplexed two 1.5G data streams).
Regards,, Nasser
Hi,
Is there any schematics or design changes required for Level A and Level B. I'm unaware how the switching from Level A to Level B is done. Does anything have to be taken care during design of this cable driver.
Greetings,
Schematic is the same for level A and B both on the equalizer and cable driver sides. Video frame structure is different between these two levels.
Regards ,,Nasser
Hi,
How does the IC take care of Level A and Level B. Does it take care through I2C or any register bit change.
How will the IC get to know.
Hi Shifali,
LMH0397 does not know if there is level A or B going through the part. LMH0397 cleans up the jitter and performs 75-ohm to 100-ohm conversion and vice versa. LMH0397 does not encode or decode video frame going through the device.
Regards,, Nasser
Hi,
Could you please let me know where exactly the Level A and Level B comes into picture, if its not dependent on IC
Hi Shifali,
It is coming from FPGA or video processor driving LMH0397 device. Please note figure 20 of the LMH0397 data sheet.
Regards,, Nasser