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The BER of TLK3101

David Zhang16358
Expert 1860 points

TLK3101 requires the peak to peak jitter of GTX_CLK is under 40ps, based on this parameter what is the BER of TLK3101?

Thanks.

  • 0
    TI__Expert 7850 points

    Hello,

     

    The achievable BER is influenced by many factors such as jitter on the reference clock (GTX-CLK),  power supply noise, and the overall high speed signal path design. Given a GTX_CLK within data sheet limits, proper power supply filtering, and adherence to acceptable high speed design rules, then typically at least a BER rate of 10^-12   can be achieved.

     

    Best Regards,

     

    Atul Patel

    Texas Instruments