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DP83869HM: Mac to Mac bridge mode

first last25
Prodigy 80 points
Part Number: DP83869HM
Other Parts Discussed in Thread: DP83869

I'm checking that this design is valid, and if so, would like to check that the 83869 is configured properly:

SWITCH MAC <= SGMII => DP83869 <= RGMII => Sitara CPSW eMAC1

I have the 83869 configured in RGMII=> SGMII Bridge mode. Register 0x01DF contains 0x0043 derived from strap configuration. register 0x6e contains 0x0600. I get no link

Register 0x05 contains 0x0000. register 0x0a also contains all 0's. for autonegotiation, which interface is the autonegotiation happening on in bridge mode?

Could someone also clarify the function and definition of bits 10,11,12 in GEN_CFG1Register(Address= 0x9)? specifically when in the bridge mode.

Regarding the document "Understanding different modes of operation in DP83869"(SNLA318), there seems to be some confusing typos. specifically, in section 1.5 "SGMII-to-RGMIIB ridge", there are instances where it refers to "RGMII-to-SGMII", i believe this is an error.

Also, in SNLA318, It refers to the SGMII interface as the "Serdes" interface. does this mean that 1000BASE-X “auto-negotiation” is used, or do the same MAC&PHY auto-negotiation rules apply?

  • 0
    TI__Expert 7040 points

    Hello,

    In GEN_CFG1, 0x0009[12:10] are used to configure the device in 1G copper modes if auto-negotiation is not possible. These bits should not be configured in Bridge modes. 

    In RGMII-to-SGMII Bridge mode as you have specified, the PHY will negotiate the speed over the SGMII interface, and then set the RX_CLK rate to match the SGMII. SGMII is referred to as SERDES in places because it is a serial interface while RGMII is parallel data. The SGMII interface is able to perform auto-negotiation with a partner, however this is different than the MDI auto-negotiation. The SGMII auto-negotiation in Bridge mode is the same as SGMII to Copper. 

    If the SGMII MAC is unable to perform auto-negotiation, you can use SGMII-to-RGMII bridge mode to use the RGMII interface to determine the speed which is passed to the SGMII interface. 

    Do you write 0x1140 to register 0x0C00 after setting register 0x01DF? 

    What speed are you targeting in your application, can you measure the RX_CLK frequency to determine if the SGMII rate is being passed to the RGMII interface? 

    Regards,
    Justin 

  • 0 in reply to Justin Lazaruk
    Prodigy 80 points

    Thank you. the answer to my problem was that i was trying to control the SGMII autonegotiation in GEN_CFG(0x0009), where i should have controlled it with 0x1140