DS90UB941AS-Q1: DSI Reference Clock Mode: Relation between input and output clock

Brahim Salh

Part Number: DS90UB941AS-Q1

Hi TI,

I'm using UB941AS in DSI Reference Clock Mode, 0x56[1:0]=00, I would like to know the relation between the input clock (DSI Clock) and the output when I use M/N dividers.

In the datasheet, this equation below below is mentioned but it doesn't contain M and N:

In the description of DSI_DIV_N and DSI_DIV_M, the equation is not mentioned:

Regards,

Brahim

over 5 years ago

0 Casey McCrea over 5 years ago

TI__Guru** 103215 points

Hello Brahim,

The M/N divider is applied to the fPCLK from equation 2, so if M/N divider is used, then the equation is:

fPCLK = (fDSI*NLanes*M)/(12*N)

Best Regards,

Casey

0 Brahim Salh over 5 years ago in reply to Casey McCrea

TI__Intellectual 1345 points

Hi Casey,

Are you sure it's 12 and not 4 ? I think the 12 comes from the default values of M/N which is 1/3.

The equation should be this one:

fPCLK = (fDSI*NLanes*M)/(4*N)

I tested this with different M/N values and all the results are compatible with the above equation.

Regards,

Brahim

0 Casey McCrea over 5 years ago in reply to Brahim Salh

TI__Guru** 103215 points

Hey Brahim,

Yes you are right - thanks for pointing this out

Best Regards,

Casey

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DS90UB941AS-Q1: DSI Reference Clock Mode: Relation between input and output clock