DS90UB936-Q1: Lock issue

Jeffrey Chung1

Part Number: DS90UB936-Q1
Other Parts Discussed in Thread: DS90UB933-Q1, ALP

Hi,

I'd like to ask you about the issue that Lock is failed and low even though the cable connection between DS90UB933-Q1 board and DS90UB936-Q1 board is perfect. Attached file below is a register dump of 936 deserializer. Schematic review had been finished before through TI e2e forum. Please let me know how to fix it.

Fullscreen DS90UB936-Q1_regdump.txt Download

     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
00: 60 00 1e 20 d3 01 00 fe 1c 10 7a 7a 83 09 26 7f    `.? ??.???zz??&?
10: 00 00 00 00 c1 00 00 00 e0 00 00 00 00 00 04 02    ....?...?.....??
20: 20 81 00 00 00 00 00 00 00 00 00 00 00 00 00 00     ?..............
30: 00 00 00 21 40 00 00 00 00 00 00 01 14 6f 00 40    ...!@......??o.@
40: 00 a7 71 01 00 00 00 00 00 00 00 92 00 00 02 00    .?q?.......?..?.
50: 00 00 00 00 00 00 00 00 58 00 00 00 ba 20 a0 00    ........X...? ?.
60: 00 00 00 00 00 20 a0 00 00 00 00 00 00 7e a8 88    ..... ?......~??
70: 2b 2c e4 00 00 00 00 c5 00 01 00 00 20 00 00 00    +,?....?.?.. ...
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
a0: 02 0f 00 00 08 19 00 00 00 00 00 00 00 00 00 00    ??..??..........
b0: 08 14 3f 08 25 00 18 XX 8e 33 83 74 00 00 00 00    ????%.?X?3?t....
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
d0: 00 43 94 04 60 f2 00 02 00 00 00 00 00 00 00 00    .C??`?.?........
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
f0: 5f 55 42 39 35 34 00 00 00 00 00 00 00 00 00 00    _UB954..........

Regards,

over 5 years ago

0 Sally Cheung95 over 5 years ago

TI__Expert 5480 points

Hi Jeffery,

For a register dump, I will need time to look this over. I will reply by Friday COB.

Thanks,
Sally

0 Jeffrey Chung1 over 5 years ago in reply to Sally Cheung95

Genius 3310 points

Hi Sally,

Thanks for your support. I'll wait for your response. Please let me know that if you need the additional information.

Regards,

0 Sally Cheung95 over 5 years ago in reply to Jeffrey Chung1

TI__Expert 5480 points

Hi Jeffrey,

Couple things I'd like to ask. What's the PCLK on the 933? Also if the PCLK being supplied from the imager or externally sourced? In RAW 12 mode, LOCK is only high if there is a link with a SER that has an active PCLK.

Also, can you try running MAP on the ALP?

Thanks,
Sally

0 Jeffrey Chung1 over 5 years ago in reply to Sally Cheung95

Genius 3310 points

Hi Sally,

Thanks for your support. The PCLK frequency and reference clock source of 933 is being checked. I'll let you know that as soon as possible. Also, my customer did not check the margin analysis on ALP. So, I recommended them to check the margin analysis.

Regards,

0 Jeffrey Chung1 over 5 years ago in reply to Sally Cheung95

Genius 3310 points

Hi Sally,

I got the information on PCLK frequency and reference clock source of 933. The PCLK on 933 is 49.5MHz which supplied from external XTAL. Also, as I told you, I recommended them to check the margin analysis. But it is very difficult to check the margin analysis due to the complicated interface connection of their DVRS system. Please let me know your solution.

Regards,

0 Sally Cheung95 over 5 years ago in reply to Jeffrey Chung1

TI__Expert 5480 points

Hi Jeffrey,

Can you please try to push then harder to run MAP? I understand that it may be complicated to solder I2C lines on the board, but it will help us diagnose the link.

Thanks,

Sally

0 Jeffrey Chung1 over 5 years ago in reply to Sally Cheung95

Genius 3310 points

Hi Sally,

I totally understand that the margin analysis will help us check the link. So my customer is trying to run MAP on their board. Did you review a register dump of 936? Are there any points to correct that? Please let me know that.

Regards,

0 Sally Cheung95 over 4 years ago in reply to Jeffrey Chung1

TI__Expert 5480 points

Hi Jeffrey,

It looks like you have a cable fault, open/short, because there is no link clock detected at the RX input of the 936 (0x4E =0x02). Can you check the hardware of the system?

Thanks,
Sally

0 Jeffrey Chung1 over 4 years ago in reply to Sally Cheung95

Genius 3310 points

Hi Sally,

My customer had already checked the hardware connection. There was no hardware issue of system like a cable fault, open/short. I want to know that this lock fail issue can be occurred when I2C bus is hung up due to an invalid termination of a transaction. Is it possible?

Regards,

0 Sally Cheung95 over 4 years ago in reply to Jeffrey Chung1

TI__Expert 5480 points

Hi Jeffrey,

The register dump indicates that there is fault - potential short or open, so they should check once more. Are you using PoC to power the SER? If so, can you disconnect it and try power both SER & DES separately? I2C failure shouldn't affect lock.

THanks,

Sally

0 Jeffrey Chung1 over 4 years ago in reply to Sally Cheung95

Genius 3310 points

Hi Sally,

Yes, they are using PoC to power the SER. But it is difficult to power both separately because their DVRS had already applied on inside car system. Let me check with my customer.

Regards,

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DS90UB936-Q1: Lock issue