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DS25BR204: Output termination and power down

Steve Widener
Genius 10145 points
Part Number: DS25BR204

  1. How does the “PWDNn” Signal work? Does this signal tri-state the individual LVDS output buffer? Its not clear to me in the datasheet what is the voltage on the output of the buffers when PWDNn is asserted.
  2. Both the output and input are terminated with a 100Ω resistor internally. However, in the user guide schematics, the input is terminated again. Is this an indication that I need a an external 100 ohm termination as the user guide shows?

  • 0
    TI__Guru* 93670 points

    Hi Steve,

    1). In PWDN mode, common mode voltage is maintained at 1.2V and the output is tri-stated. In most applications, outputs are AC coupled so you may not see this common mode voltage.

    2). Yes please include 100-Ohm Resistor. Place this as close to the device as possible.

    Regards,, nasser