SN65DPHY440SS: SN65DPHY440SS entered ULPS mode without host sending 00011110, host needs to wait long time to send 05 11 (sleep out) to display DIC

Nu

The DPHY440 has an internal 300k pullup, you should have an external pulldown cap to create the RC time constant delay. The recommended cap is 0.22uF.

Thanks

David

The reset pin already has the cap.

My problem is not about not able to use the re-timer. I am able to 100% display on my panel for the 1st time, but I can not light up display for a 2nd time. SN65DPHY440SS seems to be in ULPS mode because I failed to get 05 11 at the output for the 2nd time light-up. 

Since the reset is always high and MIPO host does not send command SN65DPHY440SS to ULPS, I am curious any other reason the we failed to light up display at the 2nd display on.

Thanks,

Nu

Can you clarify your workaround, add delay 40ms to activate the re-timer, how do you do that?

If the DPHY440 is in the ULPS state, do you issue a ULPS Exit command to exit the ULPS state?

Thanks

David

Thanks David,

If the DPHY440 is in the ULPS state, do you issue a ULPS Exit command to exit the ULPS state?

>> actually, I have have no idea what happened to DPHY440, and why it does not output 05 11 for my 2nd display on 05 11 command. ULPS is my hypothesis. I appreciate your guidance check what happened to the re-timer.

If available, I can setup cc and share my screen for discussion.

Can you clarify your workaround, add delay 40ms to activate the re-timer, how do you do that?

>> delay between D0P/D0N high to  1st command 05 11

40us : 1st screenshot

40ms: 2nd screen shot.

Thanks,

Nu

Thanks for the clarification on the workaround.

If you look at the DPHY440 functional modes diagram, you can see a LP11 is needed for the DPHY440 to exit from the ULPS state and into the LP state. Your scope picture shows the D0P/N are driving the '11' condition on the bus before sending the MIPI command of 05 11. The DPHY440 data sheet does not state the required LP11 timing. I am checking with the design team on this timing requirement and will reply back to you as soon as I have this information. 

Thanks

David

Hi David,

"If you look at the DPHY440 functional modes diagram, you can see a LP11 is needed for the DPHY440 to exit from the ULPS state and into the LP state."

This is my workaround and also where my confusion comes from. I do not know why DPHY440 has long response time after LP11. My guess is that it goes into ULPS mode. Would you mind help check with design team or application team when DPHY440 would have long response? If that is related ULPS, without sending ULPS command or toggle reset low, is there any other trigger make it sleep?

Our top confusion is DPHY440 has long response time and what made it "sleep".

"The DPHY440 data sheet does not state the required LP11 timing."

Regarding LP11 timing, I also failed to find the info from data sheet. But I got something from the MIPI standard. 

Thanks,

Nu

I am checking with the design team on the DPHY440 long response time as it seems to me the 40ms seems too long. 

Thanks

David

Nu

The design team feedback is that the transition time from the ULPS state to the LP state is 145ns + 10UI.

Can you please take a zoomed-in scope plot right before the 05 11 command is being issued? Please include both the D0P/N and CLKP/N as we want to see how the DPHY440 is being transitioned from each state on these lanes.

Thanks

David

Can you please take a zoomed-in scope plot right before the 05 11 command is being issued? 

Screenshot is showing the 1st command for our display on sequence. LP11 -> 05 11. The waveform is captured at the input of the DPHY440

Since sleep out is the 1st command under LP mode, do we really need CLK? The Clock was not captured and we may need to re-capture it.

Nu

Yes, can you please capture the clock waveform right before the LP command of 05 11?

Thanks

David

Hi David,

Currently I may not have bandwidth re-capture the clock in short-term, so there maybe delay in the reply. Do you have any expectation for the waveform? and can we prioritize finding why DPHY440 entering the ULPS mode?

Thanks,