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Original question:

DS90UB954-Q1: CLK output frequency

DS90UB954-Q1: MIPI CSI-2 speed config

Kai Kallnischkies
Prodigy 140 points
Part Number: DS90UB954-Q1

Hello,

we use the 953 and 954.

1)

is it possible to configure other CSI-2 Output Speeds, except of the 3 values in Register CSI_PLL_CTL (Address 0x1F)?

Are there some hidden configurations behind the "RESERVED" bits?

The Problem is, that we want to connect an embedded board with max 1.5Gbps.

2)

Serializer side (953)

Can we send more than 832Mbps/lane when we use only 2lanes?

i.e.: 4lanes x 832Mbps = 3.328Gbps

2lanes x 1.664Gbps = 3.328Gbps?

Regards

Kai

  • 0
    TI__Expert 5480 points

    Hi Kai, 

    If you want to use 1.5 Gbps, you should change the reference frequency to ~23 MHz. Please see table 13 that explains this a little. The CSI-2 speed is proportional to the refclk, multiple the refclk * 64 to find the lane rate. 

    No, the max lane rate is 832 Mpbs regardless of the number of lanes. 

    Thanks, 

    Sally