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DP83TC811R-Q1: Enabling Magic pattern WoL

jacpton
Prodigy 50 points
Part Number: DP83TC811R-Q1
Other Parts Discussed in Thread: DP83TC811EVM, DP83TC811

I'm difficulties configuring the DP83TC811EVM to recognise WoL magic packet. I have set the registers mentioned in Section 8.3.1.3 of the datasheet (WoL enable, no CRC/Sec-on Wol magic pattern enable, WoL interrupt enable), the WOL_DAx registers, and configured interrupt output for level instead of pulse.

Sending a WoL magic packet does not trigger an interrupt on the INT pins.

This is my setup

PC (192.168.0.1) <-> USB-ethernet adapter <-CAT5-> DP83TC811EVM (monitoring this board for WoL interrupt) <- 2-wire-ethernet-> DP83TC811EVM <-CAT5-> USB-ethernet adapter <-> Same PC (192.168.0.2)

The ethernet adapters have static IPs, 192.168.0.1 & 192.168.0.2 , with subnet 255.255.255.0. Communication between 0.1 & 0.2 is working as confirmed via ping.

Wireshark shows my WoL  magic packet is being sent

e.g. Source 192.168.0.1, Dest 192.168.0.255, MAC set to 11-11-11-11-11-11

0000   ff ff ff ff ff ff 00 e0 4c 68 27 4c 08 00 45 00   ........Lh'L..E.
0010   00 82 09 36 00 00 80 11 ae e4 c0 a8 00 01 c0 a8   ...6............
0020   00 ff e8 8c 00 09 00 6e 60 f8 ff ff ff ff ff ff   .......n`.......
0030   11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11   ................
0040   11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11   ................
0050   11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11   ................
0060   11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11   ................
0070   11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11   ................
0080   11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11   ................

Firewall is off/set to allow all.

Any ideas?

  • 0
    TI__Genius 11725 points

    Hi Jason,

    To confirm the issue, The PC 0.1 is sending the magic packet to the first DP83TC811EVM and you are monitoring this board for the interrupt?

    Can you please provide a register read of the following registers:

    • 0x0
    • 0x1
    • 0x4A0
    • 0x4A1
    • 0x12

    Thank you,

    Nikhil

  • 0 in reply to Nikhil Menon
    Prodigy 50 points

    Correct - PC 0.1 is sending the magic packet to the first EVM. I am monitoring both INT and INH pins for level changes.

    I have tried the other way around too (PC 0.2 to first EVM) and that does trigger an interrupt.

    Here are the register values.

    • Reg 0x0:      0x2100
    • Reg 0x1       0x0065
    • Reg 0x4A0  0x0183
    • Reg 0x4A1  0x0000 (WoL interrupt source always reads 0, even after setting it 1)
    • Reg 0x12    0x0010

    Regs WOL_DAx (0x04a2-0x04a4) have been set to 11-11-11-11-11-11 to ensure byte order does not matter. I have tried using a different destination MAC address & corresponding magic packet but again this does not trigger an interrupt.

    Thanks

  • 0 in reply to jacpton
    TI__Genius 11725 points

    Hi Jason,

    If you swap the PC's or the placement of the EVMs does the same board consistently show the same problem?

    Thank you,

    Nikhil

  • 0 in reply to Nikhil Menon
    Prodigy 50 points

    I have tried from PCs both ends, as well  as swaping the EVM boards between PCs and still have the same problem.

    Thank you

  • 0 in reply to jacpton
    TI__Genius 11725 points

    Hi Jason,

    To break down the setup further, breaking apart the media converter EVM, we have the following setup:

    PC - cable - DP83822 - DP83TC811 - cable - DP83TC811 - DP83822 - cable - PC.One thing I want to clarify, WoL functionality is only available across the cable side. If the first PC is sending the WoL signal to the DP83822 side of the DP83TC811EVM, this first DP83TC811 will not trigger an interrupt as the DP83822 is acting as a MAC. However, the second DP83TC811 will trigger and interrupt from the WoL signal as it comes from across the cable from the first DP83TC811.

    Can you confirm the setup?

    Thank you,

    Nikhil

  • 0 in reply to Nikhil Menon
    Prodigy 50 points

    Hi Nikhil,

    I have tried sending a WoL packet from either end, to either DP83TC811 EVMs with no luck.

  • 0 in reply to jacpton
    TI__Genius 11725 points

    Hi Jason,

    We are looking into this and will provide more feedback by Monday.

    Just to confirm, the setup is PC1 - 811EVM1 - 811EVM2 - PC2. Previously PC1 sent a WoL signal to 811EVM1 and no interrupt was triggered. PC2 sent a WoL signal to 811EVM1 and was able to trigger an interrupt. But now sending a WoL packet from either PC to either 811EVM does not generate an interrupt?

    Thank you,

    Nikhil

  • 0 in reply to Nikhil Menon
    TI__Genius 11725 points

    Hi Jason,

    The app note linked above describes different ways of using both standard and custom magic packets in both level and pulse mode. Please keep in mind that a standard and custom magic packet cannot be used at the same time. The app note provides scripts for each method as well. Please let me know if you continue to have issues.

    Thank you,

    Nikhil