Hi,
My customer is using DP83848IVV for the railway environment. Here the TI device interfaces via RMII to a STM32F207 (ARM M2).
Now he has to design a new board again for the railway that will use a PHY to interface via MII or RMII to a STM32F407 uC (it's an ARM M4).
Can we propose to customer a newer p/n, maybe pin to pin with the DP83848IVV with Tamb up to 105°C and perhaps with improved robustness characteristics from the EMC point of view?
During the design review with the end customer it was found some issues wiht the timing on the RX and TX signals towards / from the uC.
So maybe the new p/n can have some better data like for delay, set up and hold times?
Many Thanks,
Antonio