Hi,
I'd like to ask you about I2C bus issue of DS90UB936-Q1. Please answer me on my customer's questions below.
1. When I2C bus is hung up(SDA is low, SCL is high) between MCU(I2C master) and 936 due to MCU’s power disconnection issue, Can this condition effect on lock status of 936?
2. I2C control 2 register (Address 0x09)
1) Default value of 0x09[0] is 0x0. I think that I2C bus watchdog timer is disabled by 0x0. Right?
2) It says that when this timer is enabled, the I2C Watchdog Timer may be used to detect when the I2C bus is free or hung up following an invalid termination of a transaction in datasheet.
I think that “I2C bus is free” means there is no signal on I2C bus. Right?
3) It says that If SDA is low and no signaling occurs, the device will attempt to clear the bus by driving 9 clocks on SCL in datasheet.
Without MCU’s I2C bus clearing, Can I2C bus be cleared automatically by 936 itself drives 9 clocks on SCL even though SDA is low and SCL is high?
Regards,
