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Original question:

TS5MP646: 2:1 MIPI switch solution

TS3DV642: Can TS3DV642 be used as a MIPI switch for both DPHY and CPHY ?

user5071138
Prodigy 20 points
Part Number: TS3DV642
Other Parts Discussed in Thread: TS5MP646

We need a MIPI switch for a new design. As far as I now, TS5MP646 is a 2:1 MIPI switch for both DPHY and CPHY. However, the pads are too near to place the trace, and they have to use buried blind via. Can TS3DV642  be used as a MIPI switch for both DPHY and CPHY ? Can the unused I/O signal pins leave floated, or they should be connected to ground through a 50 Ω resistor?

  • 0
    TI__Guru**** 177081 points

    Hi,

    Please see this e2e response: 

    .

    For unused I/O, please leave floating on both the input and the output side.

    Thanks

    David

  • 0 in reply to David (ASIC) Liu
    Prodigy 20 points

    Hi David,

    Thanks for your reply. 

    One more question:

    Taking the Propagation Delay and SKEW into account, how to assign the CPHY pin map? Which pin map as below is better?

    Case 1: A0=SCL, B0=SDA, C0=D0+, A1=D0-, B1=D1+, C1=D1-, A2=D2+, B2=D2-, C2=D3+, leave D3-, HPD and CEC floated.

    Case 2: A0=SDA, B0=D0+, C0=D0-, A1=D1+, B1=D1-, C1=D2+, A2=D2-, B2=D3+, C2=D3-, leave SCL, HPD and CEC floated.

    Case 3: A0=D0+, B0=D0-, C0=D1+, A1=D1-, B1=D2+, C1=D2-, A2=D3+, B2=D3-, C2=HPD, leave SCL, SDA and CEC floated.

    Case 4: A0=D0-, B0=D1+, C0=D1-, A1=D2+, B1=D2-, C1=D3+, A2=D3-, B2=HPD, C2=CEC, leave SCL, SDA and D0+ floated.

    If all the pin map above are inappropriate, please help to provide an appropriate pin map.

    Thanks and Best Regards.

    Tom

  • 0 in reply to user5071138
    TI__Guru**** 177081 points

    Tom

    MIPI C-PHY is based on an embedded-clock three-wire signaling method carrying 2.28 bits per three-wire lane, with a total of nine wires per port. So I am not sure how your pin map correlating to the C-PHY implementation.

    The SCL, SDA, HPD paths are not different than the other signal paths in the device but are labeled differently to match up with the signals used in HDMI applications. So the mapping should be done to make sure the output signal assignment matches with the input signal assignment. The assignment is made to ease the board layout as much as possible.

    Thanks

    David