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DS90UB953-Q1: jitter and delay specification in CLKOUT

Takahiro Saito
Expert 5465 points

Part Number: DS90UB953-Q1

Hi team,

Customer is using DS90UB953 and 954 setup. They wants to know the CLKOUT specification if it meets the input requirement of the image sensor. They uses 25MHz of REFCLK to DS90UB954 in synchronous mode. Could you check below questions?

1) Could you check the below specification of CLKOUT?

     - Jitter

     - Delay from REFCLK of 954 to CLKOUT

2) Could you check the jitter tolerance of 953's backchannel input? Is it 0.4UI in the datasheet of 953?

3) Could you tell me the below specification of output clock from 954 through back channel?

     - Jitter

     - Delay from REFCLK of 954 to CLKOUT

 Regards,

Saito

  • 0
    TI__Mastermind 30515 points

    Hi Saito,

    It sounds you have similar questions in e2e? for this thread, pls check below comments:

    1. The additive jitter of CLKOUT spec. is above 100ps level. in most cases if integer divider is used.

    2. This is dependent on the clock mode in your system. If 953's reference clock is set from back-channel, this jitter spec. should be strictly. the 0.4UI spec. just is used for back channel data receiver without bit error if the 953's clock is from external clock or internal clock

    3.Jitter is about several hundreds of ps if the CLKOUT is generated with integer divider, and the latency mainly is depended on the I2C setting rate.

    regards,

    steven