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DP83822H: Auto Negotiation always failed

Sandy Chen
Prodigy 60 points
Part Number: DP83822H


Hi all,

I am using DP83822H in our designed board. The bootstrap pins (RX_D3, RX_D1, RX_D0, CRS_DV) are connected directly to the MCU without external pull-up or pull-down resistors. LED_0 Pin is connected to an external pull-up resistor(2.49K ohm). Others are left unconnected. 

I would like to use it in the RMII master mode, so I set the register IOCTRL1(0x462) in value 0x4301, CR2(0x0A) in value 0x0104, RCSR(0x17) in value 0x0021.

Setting auto-negotiation ANAR(0x04) in value 0x01E1, BMCR(0x00) in value 0x3100, PHYCR(0x19) in value 0x8001.

We found the BMSR(0x01) auto-negotiation complete (bit 5) is always 0, and the link status (bit 2) is read as 0. 

Here are the registers I read:

BMCR(0x00) 0x3100

BMSR(0x01) 0x7849

ANAR(0x04) 0x01E1

ANLPAR(0x05) 0x0000

CR1(0x09) 0x0000

PHYSTS(0x10) 0x0002

PHYSCR(0x11) 0x0108

MISR1(0x12) 0x0000

MISR2(0x13) 0x0800

RCSR(0x17) 0x0021

PHYCR(0x19) 0x8001

SOR1(0x467) 0x5FCF

SOR2(0x468) 0x0004

Why is the auto-negotiation process could not complete and link? Is there anything I miss or setting wrong?

Thanks.

Sandy

  • 0
    TI__Genius 16030 points

    Hello Sandy,

    I am checking on this and should be back with answers in a day or two. Meanwhile, can you do the following :

    1. Check if 50MHz clock is present at Rx_d3?

    2. After your configuration, write : register <0x001F> = 0x4000 and check if you see link-up.

    --

    Regards,

    Vikram

  • 0 in reply to Vikram Sharma
    Prodigy 60 points

    Hi Vikram,

    Thanks for your reply.

    There is no 50MHz clock output through RX_D3.

    Adding the digital restart( register 0x1F)=0x4000, I still could not link, either not have 50MHz clock output.

    Thanks.

  • 0 in reply to Sandy Chen
    TI__Genius 16030 points

    Hello Sandy,

    Looks like phy is not getting programmed to Rmii master mode. Kindly share the values of register 0x0467 and 0x0468.

    --

    Regards,

    Vikram

  • 0 in reply to Vikram Sharma
    Prodigy 60 points

    Hi Vikram,

    I tested a second board and did the exact same configure as the first one. The two boards had the same situation, which is auto-negotiation could not complete and link. 

    When reading the register SOR1(0x467) and SOR2(0x468), it had different values. Board#1 has 0x5FCF in SOR1 and 0x0004 in SOR2, and board#2 has 0x5FCF in SOR1 and 0x0000 in SOR2.

    board #1 

    0x467(SOR1) 0x5FCF

    0x468(SOR2) 0x0004

    board#2

    0x467(SOR1) 0x5FCF

    0x468(SOR2) 0x0000

    ---Update---

    I put a pull-up and a pull-down resistor at RX_DV pin to make the bootstrap in mode 3.

    Reading register SOR1(0x467), SOR2(0x468) and get 0x5FEF, 0x0004.

    RX_DV is in mode 3, which is RMII Master mode. But RX_D3 still not have 50MHz clock output either before or after register configuration.

    Thanks.

  • 0 in reply to Sandy Chen
    TI__Genius 16030 points

    Hi Sandy,

    Can you also check voltage of Rbias pin and pin 8.

    --

    Regards,

    Vikram

  • 0 in reply to Vikram Sharma
    Prodigy 60 points

    Hi Vikram,

    The voltage of RBIAS is 0.96V and pin 8(INT/PWDN_N) is 3.27V.

    There is a 4.87K ohm 1% resistor between RBIAS and GND, and a 10K ohm pull-up resistor on Pin 8(INT/PWDN_N).

    ---Update---

    I disable all the internal pull-up and pull-down resistors in MCU. Reading 0x467, 0x468 again, and get 0x0FEF, 0x0000 which is as my expect value.

    The RX_D3 still not having a 50MHz clock output, instead, I measured a 61 MHz signal on it. 

    Thanks.

  • 0 in reply to Sandy Chen
    TI__Genius 16030 points

    Hello Sandy,

    I am suspecting something is going wrong during power up. Kindly share the following :

    1. voltage levels of AVDD and VDDIO

    2. value of register 0x0421.

    --

    Regards,

    Vikram

  • 0 in reply to Vikram Sharma
    Prodigy 60 points

    Hi Vikram,

    The voltage of AVDD is 3.31V, and the voltage of VDDIO is 3.32V.

    I noticed that register 0x421 was not described in the datasheet, so I read 0x421 and other registers related to power mode.

    BMCR<0x00> = 0x3100

    PHYSCR<0x11> = 0x0108

    BISCR<0x16> = 0x0100

    DPDWN<0x428> = 0x0000

    <0x421> = 0x0000

    Hope these would help.

    Thanks.

  • 0 in reply to Sandy Chen
    TI__Genius 16030 points

    Hi Sandy,

    Register 0x0421 is an internal debug register and its value being 0x0000 indicates that PHY is detecting AVDD and VDDIO as 1.8V. Can you please add the following register in your configuration and see if you get 50MHz clock :

    Reg<0x041F> = 0x1C00.

    --

    Regards,

    Vikram

  • 0 in reply to Vikram Sharma
    Prodigy 60 points

    Hi Vikram,

    I add the register 0x041F in my configuration and RX_D3 start having the 50MHz clock output.

    Now I read the register 0x0421 again and get 0x0007. The auto-negotiation and link-state are both working fine.

    But I wonder why the PHY would detect a different voltage?

    Does it mean our hardware has serious noise interference?

    Is the setting of register 0x041F change the result of voltage detected so the 50MHz clock starts output?

    Thank you for your help.