Team,
We use 947/948 pair in my application.
Now we set 8pair LVDS input and clk+/-. If our clk+/- = 150MHz. The output on display is ok. But when we lower(140MHz) the clk or higher the clk(160MHz), the display will be abnormal. Our resolution is 1920*1200.
As I know, different clk may cause different frame rate, but display may be normal. Could you let us know which part could we check.
Roy
