FPC402: FPC402 prefetch questions

Devendra Rana

Part Number: FPC402

We are writing a state machine in FPGA to control QSFP+ and QSFP28 devices using FPC402. Planning to run host I2C interface at faster rate and QSFPs at slower speed.

The requirement is to read LOS and other alarms from QSFPs and control LEDs. We will be using periodic prefetch for this. Questions -

If I need to access QSFP addresses provided in table 8-6, where will I have the data read back?

How are QSPFs accessed? Will it be transparent access to the QSFPs based on the device IDs?
How does speed conversion happen? Is the FPGA responsible for changing the clock speed?

If we are supposed to write LEDs, do we need to STOP the prefetch operation or will it be handled internally?
Once the data is taken and written into the FPC402 memory, will it continue getting the new data or do we need to start it over again?
If the LOS happens on QSFPs, it will be latched, if I clear the FPC402 memory, will it be cleared in QSFPs?
What is the address of FPC402 memory that we need to read once the prefetch is complete? If it is happening in the FPC402, would it be accessed at FPC speed or QSFP speed (in case speed conversion does not happen inside FPC402)?

over 4 years ago

0 Nasser Mohammadi over 4 years ago

TI__Guru* 93670 points

Hi Devendra,

1). Once prefetch registers are set, device holds prefetched data in its local memory. Once prefetched data is available then a flag is set. Then when host request or reads the specific QSFP and prefetched data range, it is read directly from the local memory. Access is transparent to the QSFP based on the device ID and address range. FPC device does the speed conversion. As far as FPGA is concerned, it is just talking to the FPC device through host bus only.

2). If you don't want to go through prefetch read or write then you need to use remote access to directly access LED. In this case, we need to stop prefetch operation through register control.

3). There are register settings that allows FPC to continue getting the data at certain interval or number of times.

4). In the case of LOS, i believe you have to instruct FPC to clear it in QSFP registers.

5). Speed conversion happens inside FPC and it is seamless or transparent data transfer.

Please note there is programming guide and SDK that could drastically help your driver development. Further it goes into detailed registers/flags for these operations. Please let me know and we can provide these tools to help with your development.

Regards,, Nasser

0 Devendra Rana over 4 years ago in reply to Nasser Mohammadi

Prodigy 20 points

Nasser Mohammadi said:

Thanks for the answers Nasser, Comments inline.

Hi Devendra,

1). Once prefetch registers are set, device holds prefetched data in its local memory. Once prefetched data is available then a flag is set. Then when host request or reads the specific QSFP and prefetched data range, it is read directly from the local memory. Access is transparent to the QSFP based on the device ID and address range. FPC device does the speed conversion. As far as FPGA is concerned, it is just talking to the FPC device through host bus only.

[Devendra] - If the FPC device does speed conversion, then it means that I am just reading QSFP registers mirrored inside the FPC correct? But this will not be true for direct QSFP accesses, please correct me. Thinking of a case where access to FPC is happening at 1MHz while QSFP accesses will be at 400KHz max.

2). If you don't want to go through prefetch read or write then you need to use remote access to directly access LED. In this case, we need to stop prefetch operation through register control.

[Devendra] - The LED is controlled through FPC ports, is it still called remote access? Since it is inside the FPC, do we need to stop the prefetch read?

3). There are register settings that allows FPC to continue getting the data at certain interval or number of times.

[Devendra] - Ok.

4). In the case of LOS, i believe you have to instruct FPC to clear it in QSFP registers.

[Devendra] - Please ignore this, OLOS signals are clear on read inside the QSFPs. So when FPC reads OLOS, these shall be cleared.

I have a question though - does FPC know which type of QSFP is connected to the ports (QSFP+ or QSFP28)? This will let FPC decide what addresses to be accessed for these QSFP devices?

5). Speed conversion happens inside FPC and it is seamless or transparent data transfer.

[Devendra] - Ok

Please note there is programming guide and SDK that could drastically help your driver development. Further it goes into detailed registers/flags for these operations. Please let me know and we can provide these tools to help with your development.

[Devendra] - Programming guide will certainly help me. Please share that.

Regards,, Nasser

0 Nasser Mohammadi over 4 years ago in reply to Devendra Rana

TI__Guru* 93670 points

Hi Devendra,

1). There are two modes:

a). QSFP Registers mirrored inside the FPC.

b). 2nd mode remote access: In this mode, you can directly talk to the QSFP registers. FPC device - in this case - does clock stretching - to synchronize between high speed host and slower speed QSFP module.

2). Since LED is driven by FPC, then this is not a remote access. I thought somehow this is within the QSFP module/registers.

3). There is default address(0xA0 & 0xA2). These are programmable through FPC registers.

4). Please follow link below to request programming guide and SDK as well.

https://www.ti.com/licreg/docs/swlicexportcontrol.tsp?form_id=202045&prod_no=FPC402-DESIGN&ref_url=asc_hsdc

Regards,, Nasser

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FPC402: FPC402 prefetch questions