1. DP83867 Troubleshooting Guide (Rev. A) shows Near-End Loopback Example with RGMII. My customer is using SGMII interface. They'd like to know what register configurations needed to meet Near-End Loopback Example.
Further more, how to check loopback data rate, Packet Loss Rate etc. and how to verify if communication between MAC & PHY SGMII ok?
2. My customer tested eye diagram of SGMII and confirmed that the signal quality of SGMII basically meets the requirements. Therefore, it hopes to verify the MDI interface through the Far-End Loopback test. If Link Partner a tool for issuing packages running on a PC? and is it recommended for PC?
3. Does it need to reset all registers before writing the following two registers? In this Far-End Loopback test, can the computer network port obtain an IP address? Thanks.
a. Write register 0x0016 to 0x0020 to enable reverse loopback.
b. Write register 0x001F to 0x4000 to apply a software restart.
