To perform an external PRBS BIST test, I made a loopback cable with a 1<->3&2<->6 pinout. then performed these register actions:
1. write 0x8000=> 0x00 # reset the phy
2. write 0x2100=> 0x00 # 100mbps, no autonegotiation
3. write 0x5008=> 0x10 # manual MDI
4. write 0xf010=> 0x16 # enable the bist generator and place in external loopback
5. read 0x17 . result is 0x0e40
6. read 0x17. result is 0x0a40
This seems to indicate that the there is a PRBS lock., but when trying to check if there are any errors and what the error rate is, the byte counterss do not increment:
7. write 0x1f=> 0x0d
8. write 0x39=> 0x0e
9. write 0x401f=> 0x0d
10. write 0x003 => 0x0e # enable continuous checking
wait a few seconds
11. read 0x0e. result is 0x03 # the PRBS_TX_CHK_SYNC_STS bit is 0. What is the difference between this and the PRBS lock bit indication from the GEN_STATUS2 register above?
12. PRBS_TX_CHK_ERR_CNT and PRBS_TX_CHK_BYTE_CNT remain 0.
Is this the corect procedure for performing an external BIST check?
are there any documents that describe methods for testing the rest of the loopback modes?
