Hi Experts,
Table 48 shows STRAP_STS2 register value. Bit 6:4 description shows these bits hold RGMII_TX_DELAY_CTRL[2:0]. My understanding is that these bit hold RGMII Clock Skew TX[2:0].
Could you please confirm it?
Regards,
Uchikoshi
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Hi Experts,
Table 48 shows STRAP_STS2 register value. Bit 6:4 description shows these bits hold RGMII_TX_DELAY_CTRL[2:0]. My understanding is that these bit hold RGMII Clock Skew TX[2:0].
Could you please confirm it?
Regards,
Uchikoshi
Hi Uckikoshi-san,
Yes, the bits held in STRAP_STS2 register 0x006F[6:4] correspond to the Table 8: RGZ RGMII Transmit Clock Skew Details in section 8.5 of the DP83867IR datasheet.
Regards,
Justin