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Original question:

Question about current path of SN75374

SN75374：VCC2, VCC3 Power Line

user6083619
Prodigy 180 points
Part Number: SN75374

Hi TI.

I am currently evaluating the circuit using the SN75374, but I would like to know about the internal circuit of this IC.

(1) When wiring is performed as shown in the attached circuit diagram SCH1 and the 5V power supply is turned on, pop noise of 1V or more is instantaneously generated at the output terminal Y.
As a boot sequence for this IC, it is necessary to apply the voltage of VCC1 first, and then the voltage of VCC2 and VCC3. Do you agree with me?

(2) After connecting the power supply as shown in the attached circuit diagram SCH2, when observing the terminals of VCC2 and VCC3 with an oscilloscope, the voltage was output. (Unintended voltage)
Why is the voltage output?
I did not find any internal wiring in the data sheet that would output the voltage of VCC1 to VCC2 and VCC3.

(3) As a result of answering (2), since the power supply of VCC1 is applied first in the startup sequence, unintended voltage is momentarily applied to VCC2 and VCC3.
Should the power supply circuits of VCC2 and VCC3 be dedicated circuits that are not used in combination with other circuits?

Sincerly.

YuzuruTI_SCH.pdf

  • 0
    TI__Genius 13445 points

    Hello Yuzuru,

    Thanks for reaching out.

    This is legacy device with very limited information on this IC, if possible I may suggest a more optimized solution for your application, Meanwhile, I will attempt to address your questions based on available data in the datasheet.

    1. I have reviewed the datasheet of the driver IC and it appears there is no specific power sequencing procedure. As for your power sequencing, it seems that is OK given that the outputs will be enabled and switching close to your VCC2 supply when VCC3 >=  3V + VCC2. I do not see any specific concern with VCC1 => VCC2 => VCC3.

    2. The "pop noise" appears to coincide with the dv/dt of CH-1 and CH-3, which, when supplies are subject to fast dv/dt may ringing internally on the IC and coupling to the rest of the internal IC. I suggest an external current limiting resistor on all the supplies to mitigate the dv/dt and confirm whether that limit the noise.

    3. Given that it is a non-isolated application (please confirm), I do not believe that you need a dedicated supplies for VCC2 and VCC3. I might also suggest enough delay between enabling the supplies to check whether the issue still occurs.

    Meanwhile, below is good starting point for our latest gate drivers that you might find useful.

    Regards,

    -Mamadou