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DP83TC811R-Q1: Reference clock input RMII

Isee
Expert 6620 points
Part Number: DP83TC811R-Q1
Other Parts Discussed in Thread: DP83TC811

Datasheet for Pin 5 says the following: 

<<

Reference Clock Input (RMII): Reference clock 50-MHz CMOS-level oscillator in RMII Slave mode.

Reference clock 25-MHz crystal or oscillator in RMII Master mode.

>>

I have both, a master and a slave interface in RMII mode on the board, both controlled with 50 Mhz. Datasheet says that master-mode requires a 25 Mhz clock. Could that be why I have problems with the PHY? I am not completely sure how to understand the datasheet because I could also configure both PHYs as RMII via boostrap and then set one of them via SMI to master? If that is the case do I have to change/switch the oscillator input of the PHY, or is that not allowed? And do I have to aoways provide 25 Mhz to pin 5 on the master PHY?

Thank you!

  • 0
    TI__Expert 5425 points

    Hi Andreas,

    If you are not using a 25-MHz reference clock for the RMII master PHY, then it will cause problems. If you wish to use both PHYs with a 50-MHz clock, then both PHYs will have to be set to slave mode.

    As for your other question, you can configure RMII master/slave mode via bootstrap (hardware) or register writes (software). If you are using straps, the device will be configured to whatever mode is strapped on power-up. After power-up, if you decide to switch the PHY from master to slave or vice versa, you can do so using register writes. Whichever PHY is set as the master must have a 25-MHz reference clock input.

    Regards,

    Adrian Kam

  • 0 in reply to Adrian Kam
    TI__Expert 6620 points

    Hi Adrian,

    but doesn`t RMII specification say that 50 Mhz shall be used? If I configue the PHY as slave and provide 25Mhz this will also lead to problems?

    Aside from above, can you double-confirm that you mean that customer should, independent from clock frequency, config the register via SMI so that bootstrap doesn`t have to be used?

    But has to be defined early than and hence they lose the advantage of being able to use one and the same print as master resp. slave which is not good.

    Is that the same situation for all 100Base-T1 PHYs or does DP83TC811 have special requirements?

    Regards

    Andreas

  • 0 in reply to Isee
    TI__Expert 5425 points

    Hi Andreas,

    Yes, it will cause problems if the slave is provided a 25 MHz clock, which is why a 50 MHz clock is needed for the slave PHY while a 25 MHz clock is used for the master PHY. As a result, it should be defined early which PHY will be master and which PHY(s) will be slave(s). I have linked an application note below that provides more details on RMII master/slave mode:

    https://www.ti.com/lit/an/snla101a/snla101a.pdf

    As for your second question, either bootstraps or register writes can be used to set master/slave mode. Using bootstraps sets the mode on power-up, so no register writes are needed. If no bootstraps are used, the PHY will power-up with default settings and initial register writes will be needed before the PHY should be transmitting/receiving data.

    This is the same situation for all TI PHYs with master/slave capabilities.

    Regards,

    Adrian Kam