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ONET1101L: AC-Coupled LVDS Inputs

Robin_
Prodigy 205 points
Part Number: ONET1101L

Hi,

I'm working on a design that uses three ONET1101L devices, we're driving it from an FPGA that outputs LVDS with:

  • Vocm (Common Mode Voltage) of typ. 1.25V
  • Vodiff (Differential Output Voltage) of typ. 350mV.

As per the application circuit in the ONET1101L datasheet (Fig. 19 and 20), we're AC coupling the LVDS lines into the ONET1101L device. 

My question is this - the application circuit doesn't show any biasing resistors after the AC coupling capacitors, presumably it's advisable to do this at the DIN+ and DIN- inputs?  TI application note SLAA840 outlines how to do this in an AC coupled application, see figure 3.  Are you able to confirm whether this is required?

the application note also mentions that "If a termination resistor is integrated into the LVDS receiver, then larger resistor values should be selected in order not to alter the effective termination resistance at the input of the receiver. Suggested values are 10 kΩ for the pull up and 5.7 kΩ for the pull down". This is the case with the ONET1101L, as it has a termination resistor built in, so I suspect we will have to increase the bias resistor values.

Additionally, would it be possible to get a hold of a reference design for the ONET1101L?

Thanks for your help.

Regards,

Robin