We currently have a product failing the following PD tests at GRL:
TDA.2.2.3 BMC PROT SEQ DRSWAP: DUT fails to accept DR_SWAP to DFP when DUT is Sink/UFP. Sends wait when reject was expected.
TDA.2.3.1.2 POW SRC LOAD CP ACC: The SourceCap counter is not reset to 0 as it should after PR_SWAP.
TDA.2.3.2.2 POW SRC TRANS CP ACC: Same reason as 2.3.1.2
I have found a couple of similar issues, if not exact same issue in these forum posts:
It appears that Intel should be aware of these issues and issue a waiver, but they have only responded on whether I have consulted TI.
Can you confirm that these failures are indeed known issues?
I can provide project file, GRL reports, etc. if needed.