This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DS90UB953A-Q1: Backchannel operation

Part Number: DS90UB953A-Q1

Hello,

We have some general questions about implementing SPI on the back channel from DS90UB954 to a DS90UB953A. 

1 - According to the datasheet the backchannel for this pair of parts operating in non-synchronous mode is 10MHz.  I am assuming that is the SPI datarate correct?

2 - We assume that GPIO_0 on the serializer needs to map to GPIO_0 on the deserializer.  Is that correct?

3 - To operate as a backchannel the SPI master must be on the deserializer side of the link.  Does MISO need to register as an input to the serlializer while SCK and MOSI register as inputs to the deserializer?

Thank you in advance for your consideration.

  • Hi Jack,

    SPI isn't supported on the 95x devices.

    The 953 and 954 can run in either sync (50Mhz back channel) or non-sync (10Mhz back channel) mode. 

    Best,

    Jiashow

  • Are you telling me that if I connect a SPI master to the deserializer GPIO and a SPI slave to the serializer, It won't work?  If that's the case why do the EVM indicate that SPI is routed onto the SERDES GPIO? BTW I can read the datasheet.  I understand the synchronous mode asynchronous mode.  I asked specific questions, please answer them.  Clearly your EVM and previous adverts are lies or you are just answering out of ignorance. Can you please forward this to someone who either knows what they are talking about or gives a darn.  I will be forwarding this reply  to the product group for their consideration.

  • SPI is just data transitions and should be straight pass through on GPIO.  I see no reason the SCK and MOSI could not not be inputs of two deserializer GPIO and MISO an input on the serializer IO. Please explain why this would not work.

  • Hi Jack,

    When I said it doesn't support SPI, I meant you can't program the ser and des using SPI interface. It may work if you're simply using the SerDes as a pass through for SPI.

    We have not validated SPI using GPIO. It's possible this might be supported but there are factors you'll need to take into considerations. SPI has 4 lanes which means you'll be using 4 GPIOs, the maximum recommended GPIO frequency is listed in tables 9 and 10 in the 954 datasheet. You'll need to make sure your SPI speed doesn't exceed the max supported frequency. Additionally, you need to make sure the rise/fall time is meeting your requirements.

    The back channel isn't the SPI frequency. Your SPI frequency is what your master/slave outputs. If your SPI master is on the deserializer side, MOSI, SCK, CS will be the back channel GPIO, and MISO will be the forward channel GPIO.

     

    Here are a list of registers to setting GPIOs:

    On 953 Serializer side:

    • 0x0E (GPIO INPUT ENABLE) to select which GPIOs should be inputs and which should be outputs
    • If GPIOs are outputs,
    • 0x0D (LOCAL_GPIO_DATA) to configure either GPIO info from deserializer or locally
    • If GPIOs are inputs
    • 0x33 (REMOTE_GPIO) to choose the number of GPIOs needs to be enabled (one GPIO = GPIO0, two GPIO = GPIO0,1, four GPIO = GPIO0,1,2,3)
    • 0x53 (GPIO_PIN_STS) checks which GPIOs are on/off (only works if GPIOs are inputs)

     

    On 954 Deserializer side: (GPIO3 is an open drain)

    • Check 0x4C to select specific ports
    • IF GPIOs are inputs,
    • 0x0F (GPIO_INPUT_CTRL): choose enable/disable GPIO inputs.
    • 0x6E - 0x6F (BC_GPIO_CTL): determines the data sent on GPIOx for the port back channel
    • If GPIOs are outputs,
    • 0x10 - 0x16 (GPIO_PIN_CTRL): choose enable/disable GPIO outputs, from what port, and from which SER GPIO
    • 0x59 (DATAPATH_CTL1): verify how many GPIOs you are using