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DP83867E: SGMII configuration of the DP83867E

Ted Young
Prodigy 30 points
Part Number: DP83867E

We are implementing the DP83867E. We have used it with RGMII before, now we want to use it in SGMII application. I don't understand how the strap configuration should be. This (attached) image is how we configured for RGMII. I got this reference from one of our companies recent projects. I assumed that I only needed to change the strapping configuration to have the PHY LED0 with resistors. Reading the datasheet had me completely confused.

1. what to do with unused pins,

2. Page 39 of the datasheet expresses two notes regarding RX_D3 and RX_D1 with SGMII, but I thought that those two pins are used in SGMII RX_D3 and RX_D1 are identified as SGMII_SOP and SGMII_SON, so why would they be strapped? TX_D2 & TX_D3 & RX_CTRL and RX_CLK pins, how do they get connected or not connected when in SGMII mode.

  • 0
    TI__Mastermind 39795 points

    Hello Ted,

    For unused input pins, they should not be left floating. If they have an internal pull-up or pull-down resistor, they should also be externally pulled up or down accordingly. However, if it is an unused output, leave it floating.

    Regarding RX_D3 (aka SGMII SON) and RX_D1 (aka SGMII CON), these are part of a differential signal which is paired with RX_D2 (aka SGMII SOP) and RX_D0 (aka SGMII COP). These pins are also used as bootstraps (in section 8.5) for the PHY address. If these pins are strapped, then their counterparts will need to also be strapped in order to balance the signal.

    Sincerely,

    Gerome