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DP83826I: DP83826 - MAC and MDI terminations

Sunset
Genius 13995 points
Part Number: DP83826I


Hello Team,

The DP83826 highlights integrated MAC and MDI terminations on the first page.

The Electrical Characteristics section list the pins that have the MAC series termination resistors.
So I know which pins have the integrated MAC terminations.
Table 78 for register IO_CFG1 shows a Slow Mode and a Fast Mode setting for MAC Impedance Control.
Are these modes related to the 50-Ohm MAC series termination resistor value specified in the Electrical Characteristics section?
What does Slow and Fast mean?

Table 78 for register VOD_CFG3 has settings for MDI and MDIX termination values.
Are these settings only for 10 Mbps and not available for 100 Mbps?
Why are there two sets of termination values, one for MDI (straight-through?) and one for MDIX (cross-over?)?

Thanks,

SunSet

Integrated Termination on the MAC Interface

From Electrical Characteristics table:








  • 0
    TI__Mastermind 40275 points

    Hello,

    Slow and fast mode have to do with the rise and fall time of the signal, which can be controlled through a resistor whose value can be varied. In slow mode, there is a high resistance value, while fast mode has a lower value. The value on the characteristics table is reflective of fast mode.

    The 100mbps table is located on tables 9-83 and 9-84 of the datasheet. There are two sets of termination registers as with MDI and MDIX, there is the potential for the signal path to be switched between the TX and RX pins of the PHY, so this allows the user to allow for both scenarios.

    Sincerely,

    Gerome

  • 0 in reply to Gerome Cacho
    TI__Genius 13995 points

    In regards to the DP83826, Slow and fast mode have to do with the rise and fall time of the signal, which can be controlled through a resistor whose value can be varied. In slow mode, there is a high resistance value, while fast mode has a lower value. The value on the characteristics table is reflective of fast mode.

    Slow mode is the default mode.  What is the value for the series resistor for Slow mode?
    The Electrical Characteristics table does not list TX_CLK as having the integrated MAC series termination resistor.
    Is that correct?  
     
             
    The 100mbps table is located on tables 9-83 and 9-84 of the datasheet. There are two sets of termination registers as with MDI and MDIX, there is the potential for the signal path to be switched between the TX and RX pins of the PHY, so this allows the user to allow for both scenarios.

    OK, I didn't recognize those tables as having anything to do with MDI termination.

      A new question relating to the MDI.
      I found different recommendations/implementations for the capacitors on the transformer center tap.
      Figure 10-2 in the DP83826 datasheet shows two capacitors:  1uF and 0.1uF.
      The DP83826 Evaluation Module (snlr047) shows two capacitors:  0.1uF and 0.1uF.
      Is the 1uF capacitor needed?
      If not, is one capacitor adequate?

    Thanks,

    SunSet

  • 0 in reply to Sunset
    TI__Mastermind 40275 points

    Hello,

    The slow mode resistance is measured at 90 Ohms. TX_CLK should have a series termination resistor. The datasheet had a typo. 

    Regarding the capacitor question, follow the datasheet configuration (1uF and 0.1uF).

    Sincerely,

    Gerome