DS90UB947-Q1: PWM by GPIO or I2S

Masatoshi Oguri

Hello,

My customer is considering sending PWM through DS90UB947/948 chipset. Because the PWM requires rather high resolution, its data rate or sampling frequency is higher the better. So, I would like to know how high it can be for the below 3 possible cases. Please make an answer to the below questions:

1. Standard GPIO (pin: 14, 15, 38, 39):

What is the sampling frequency?

2. High speed GPIO (pin: 43, 44, 45, 46):

What is the sampling frequency?

3. I2S (pin: 34, 35, 36)

In frame transport mode, can I2S_CLK pin used as highspeed GPI?

Or if not, with 13MHz clock being provided to I2S_CLK, can I2S_DA be used as 13MHz sampling GPI? My concern is it may have to be in I2S or TDM format.

Another question is what is the "CLK/2" in the below description in p.24 of DS90UB947 datasheet? Is it half the clock signal to CLK+/CLK- pins?

7.3.13.1 I2S Audio Interface

The DS90UB947-Q1 serializer features six I 2S input pins that, when paired with a compatible deserializer, supports 7.1 High-Definition (HD) Surround Sound audio applications. The bit clock (I2S_CLK) supports frequencies between 1MHz and the lesser of CLK/2 or 13 MHz. Four I 2S data inputs transport two channels of I 2S-formatted digital audio each, with each channel delineated by the word select (I2S_WC) input. Refer to Figure 21 and Figure 22 for I2S connection diagram and timing information.

Thanks.

Regards,

Oguri (TIJ automotive FAE)

over 5 years ago

0 Charley Cai over 5 years ago

TI__Genius 12866 points

Hi Oguri,

I am assuming GPIO is going from 947 to 948.

In this case, for both standard and high speed GPIO, they are sampled at PCLK frequency. We recommend allowing 4x over sampling, so you may want to cap the GPIO speed to PCLK/4.

In frame transport, I2S_CLK can be used as highspeed GPI.

CLK/2 is the OLDI clock rate / 2.

Best Regards,

Charley Cai

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DS90UB947-Q1: PWM by GPIO or I2S