DS90UB962-Q1: What does the CSI-2 lane speed depend on?

Sherry Liang

Part Number: DS90UB962-Q1

Dear team,

My customer uses 962 paired with 933*4. The camera PCLK is 99MHz. The data format is YUV422 8bit. FPDLINK serial rate is PCLK*28/2=1.38Gbps. In my understanding, 962's CSI-2 lane speed should be set 1.6Gbps per lane which is larger than 1.38Gbps, but it still works normally when I set 800Mbps per lane, which is very strange. Is there any wrong with my computation?

Thanks & Best Regards,

Sherry

over 4 years ago

0 Jiashow Ho over 4 years ago

TI__Genius 11340 points

Hi Sherry,

You can estimate your input bandwidth by the following: horizontal resolution * vertical resolution * bpp * frame rate * 15% blanking * # of cameras.

If you set your output bandwidth to 1.6G/lane, you'll be getting 6.4G total bandwidth (1.6Gbps/lane * 4lane).

Best,

Jiashow

0 Sherry Liang over 4 years ago in reply to Jiashow Ho

TI__Genius 10255 points

Hi Jiashow,

This camera's blanking is large, PCLK=horizontal resolution * vertical resolution * n% blanking =99MHz. In 962, we choose RAW10 because the date format is YUV422 8bit. Because choosing RAW10, the FPDLINK Serial rate=99MHz*14=1.38Gbps. Because using YUV422 8bit, per lane CSI-2 rate is 99MHz*8bit=792Mbps, so it is enough for 962 to choose 800Mbps CSI-2 lane speed, right?

Thanks & Best Regards,

Sherry

0 Jiashow Ho over 4 years ago in reply to Sherry Liang

TI__Genius 11340 points

Hi Sherry,

Is your PCLK 99MHz? If so, your estimation looks correct to me

Best,

Jiashow

0 Sherry Liang over 4 years ago in reply to Jiashow Ho

TI__Genius 10255 points

Hi Jiashow,

Yes, the PCLK is 9MHz, so the output bandwidth depends on 99MHz*8bit(YUV422 8bit)=792Mbps instead of the FPDLINK Serial rate=99MHz*14=1.38Gbps, right?

In addition, 962 output CSI signal to the SOC, and SOC has a DDR. If the DDR rate is 1.4Gbps, the display is abnormal, but after changing DDR rate from 1.4Gbps to 1.8Gbps, the display is abnormal. Do you know the reason?

Thanks & Best Regards,

Sherry

0 Jiashow Ho over 4 years ago in reply to Sherry Liang

TI__Genius 11340 points

Hi Sherry,

The output bandwidth is independent of the input bandwidth. Our 962 reconstruct the output at the rate you choose in reg 0x1F. You just need to make sure your output bandwidth is set to a value greater than your input bandwidth.

Best,

Jiashow

0 Sherry Liang over 4 years ago in reply to Jiashow Ho

TI__Genius 10255 points

Hi Jiashow,

Yes, but I am not sure if the input bandwidth is 792Mbps or 1.38Gbps?

99MHz*8bit(YUV422 8bit)=792Mbps

FPDLINK Serial rate=99MHz*14=1.38Gbps

Thanks & Best Regards,

Sherry

0 Steven(Shenzhen) Shi over 4 years ago in reply to Sherry Liang

TI__Mastermind 30515 points

Sherry, this can work, don't doubt it.

the fpd-link rate can be used as csi2 rate calculation directly, you just need focus on the PCLK freq.

Steven

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DS90UB962-Q1: What does the CSI-2 lane speed depend on?