Hi Team,
It's found that when there is jagged edges, the PLL_UNLOCK bit of 0xE5 CSR register changes to 1, what are the possible reasons for the unlocked PLL?
Thanks and Best Regards!
Hao
This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
Hi Team,
It's found that when there is jagged edges, the PLL_UNLOCK bit of 0xE5 CSR register changes to 1, what are the possible reasons for the unlocked PLL?
Thanks and Best Regards!
Hao
Hi Hao,
It looks like you have asked a similar question before: https://e2e.ti.com/support/interface/f/138/t/960419
Have you already checked the responses in that thread?
Regards,
I.K.