SN65DSI83-Q1: Schematic review

Hi Sherry,

Below are my comments:

1. IRQ should not have a pull-up resistor. It can be directly connected to the processor. 

2. Ensure the EN pin can be controlled in accordance with the timing of the initialization sequence in the datasheet.

3. It looks like 2 DSI data lanes are unused. Check the DSI CLK equation in this FAQ to ensure the DSI83 can support the required resolution: https://e2e.ti.com/support/interface/f/138/p/945185/3491595#3491595 Note the supported DSI CLK frequency range is 40 MHz to 500 MHz.

Regards,

I.K.