Hello,
I would just like to confirm that we should use the general decoupling recommendations in the datasheet for DP83867IS where it looks like every power pin has its own 0.1uF and 1uF cap, instead of the decoupling scheme in the evalkits for this part (a single 1uF, 0.1uF, 1000pF, and 100pF cap or less per power node).
I'd like to make sure I choose the right decoupling scheme for my design as my design is quite space-constrained.
Thanks,
Matthew
