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XIO2001: Reset behaviour

Part Number: XIO2001

Hello,

we observe a reset behaviour of this PCIe-PCI-bridge. There is a little drop in the pcie clock and then the device seems to reset itself.The PCIeReset is stable all the time.

The GRST pin only has a capacitor to ground and no external source.

The questions:

Indicate this GRST signal sequence that an internal reset occurs?

Can a little drop of the pcie-clock perform this internal reset of the bridge?

Thanks and regards

  • Greetings,

    Yes your understanding is correct. Given nGRST got generated. It seems there was an internal reset. GRST is a global reset and when it is asserted all registers, state machine, digital logic, and analog circuit are returned to power-up default state. In a typical application or if there is no need for a reset, GRST can simply be left floating. There is internal pullup resistor that guarantees a non-reset condition.

    No PCIe clock may trigger GRST however it has not been characterized. 

    Regards,, Nasser