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DS125DF410: Back Biasing Current when powered down

Part Number: DS125DF410

Is there any significant current that flows into the SDA/SDC or INT pins if they are powered (say a 2kohm pull-up to 3.3V) while the rest of the DS125DF410 is powered down (Vdd = 0V)?

  • No, there should not be. Per datasheet the current for these pins is only in the microamps range.

    3.3 V LVCMOS DC SPECIFICATIONS (SDA, SDC, INT)

    VIH High Level Input Voltage

    VDD = 2.5 V

    1.75 3.6

    V

    VIL Low Level Input Voltage

    VDD = 2.5 V

    GND 0.7

    V

    VOL Low Level Output Voltage

    IPULLUP = 3 mA

    0.4

    V

    IIH Input High Current

    VIN = 3.6 V, VDD = 2.5 V

    20 40

    μA

    IIL Input Low Current

    VIN = GND, VDD = 2.5 V

    –10 10

    μA

    fSDC SMBus clock rate

    Slave Mode

    100 400

    kHz

    Master Mode (5)

    400

    kHz

    Cordially,

    Rodrigo Natal

    HSSC Applications Engineer