Hi.
On a previous revision of our board we have successfully designed power delivery with a USB-C connection using TPS65987DDJRSHR. Works well.
On our second revision we are replacing a USB-A connector that supports USB2.0 and USB3.0 communication in device mode. We will configure TPS65987DDHRSHR for UFP sink mode so that our board is treated as a device when connected to a Windows or Android host.
What is unclear is what signals need to be connected to the FPGA so that its USB controller communicates properly with TPS65987DDHRSHR. GPIO (GPIO0, GPIO1, GPIO13) from the TPS65987DDHRSHR that identify it's role as UFP sink. Are these signals a don't care for the ZU+ FPGA?
Sorry this is a long post but we don't know the answer to this fundamental question.
