Other Parts Discussed in Thread: SN75DP159,
We use TMDS181 as an HDMI retimer on on our HDMI-SDI eval board. We also use SN75dp159 on our SDI-HDMI eval board. The HDMI-SDI board with TMDS181 workes fine with all HDMI 1.4. data rates. It also works fine when connected to HDMI 2.0 data rate from an lab source (Quantum, Kramer etc) but there is an issue when boards are connected back to back (SN75dp159 to TMDS181) for HDMI 2.0 data rates. We found that in this case the TMDS181 is dividing the TMDS clock frequency by 4 in HDMI 2.0 mode. For example, if the source board is sending a 4K60 signal, the TMDS clock frequency in this case is 148.5 MHz, 1/4 of the 597 MHz pixel rate of the 4K60 signal. The clock rate at the HDMI connector is 148.5MHz, but the TMDS clock out of the TMDS181 is 37.125 MHz, one-fourth the frequency of the clock at the input. When we connect the Quantum at the same data rate, for example, the TMDS clock is not divided.
This is a similar issue as already reported in [Resolved] TMDS181: TMDS clock output problem in HDMI 2.0 mode - Interface forum - Interface - TI E2E support forums, jus we use TMDS181 in source mode. The offered solution, programing divide ratio, is not acceptable (as the source doesn't know it).
We tried programing register DEV_FUNC_MODE for different settings but it made no difference.
We already had very similar issue with the SN75dp159 (it would sometimes divide the TMDS clock for HDMI2.0 rate, it is doing it random) and we solve programing it into redriver mode only. The redriver only mode is neither an option for a sink nor it is available for the TMDS181.
My question is how to fix this and why both these parts are dividing the TMDS clock at all? They are snooping SCDC, they are HDMI redriver/retimers and dividing the clock shouldn't be an option at all.
Regards,
Ilver
