Hi,
Do you have any documentation about this chip that indicates the layout guideline such as routing trace impedance / spacing requirement on CAN BUS and SPI BUS?
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Hi Jim,
Besides the Layout Guidelines in Section 11 of the datasheet and what is described in the packing sections, we don't offer any specific advice or parameters for routing or spacing. Generally it is good practice to keep digital (SPI) and analog (CAN) signals separate from one another. Often this is accomplished by placing the CAN transceiver close to the board connectors, keeping the CAN traces short.
For the impedance of the CAN traces, this should match the impedance of the cable being used. Typically this value is 120-ohms. It's also beneficial to route CANH and CANL parallel to each other with symmetrical lengths (treat as differential pair). This will help with emissions and noise rejection.
If you have any specific layout questions or would like us to review a layout file, you can ask them here or email me directly. Find my email by clicking on my E2E name.
Regards,
Eric Schott