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DS90UH940-Q1: Preferred procedure for the clock lane output to follow mipi standard

Masaru Oinaga
Expert 4415 points
Part Number: DS90UH940-Q1

​Hello, Team,

The device is DS90UH940-Q1.

The customer would like to know the preferred procedure of how to set resistors in order to start a clock lane output which follows the mipi standard.
If there is any document that demonstrates it, it would be very much welcomed.

Thanks and Best Regards,
Masaru

  • 0
    TI__Genius 12866 points

    Hi Masaru,

    Could you clarify what you are looking for? You shouldn't need resistors on the clock lane.

    For register settings, as long as data is sent to the 940, the 940 will output data and clock following mipi standard.

    Best Regards,

    Charley Cai 

  • 0 in reply to Charley Cai
    TI__Expert 4415 points

    Hello, Charley,

    The customer's setting cannot always confirm that the input signal exists at the power-up of 940.
    Therefore, they are doing digital reset after setting the initial values to the register and inputting video.
    This is according to the description given in the datasheet p90 note (1), and I believe this is required for a pairing with the Serializer.

    After the digital reset, the output sequence should follow the mipi standard; correct?

    Thanks and Best Regards,
    Masaru

  • 0 in reply to Masaru Oinaga
    TI__Genius 12866 points

    Hi Masaru,

    Yes, the digital reset is to ensure the 940 will lock to correct video stream. After the reset, the DSI output will follow mipi standard. 

    Best Regards,

    Charley Cai