HD3SS3411: Loss and increased length

Hardy Xue

Part Number: HD3SS3411

Hi team,

How much attenuation will HD3SS3411 be applied to PCIE GEN3 clock?

Is there any experience that how much line length will be increased?

Best regards,

Hardy

0 Brian Zhou over 5 years ago

clk is 100Mhz, so the loss is almost 0db.

What do you mean fo line length inreased? This is passive mux , it only reduced line length due to loss.

0 Hardy Xue over 5 years ago in reply to Brian Zhou

Hi Brain,

Sorry for my unclear question.

My customer need evaluate maximum layout trace length. So, they would like to know do we have data for trace length vs loss?

Best regards,

Hardy

0 Brian Zhou over 5 years ago in reply to Hardy Xue

if just for PCie clk, MUX will not gate your trace length. you just need to follow your PCH design guide

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