Part Number: TCA9539
Dear TI Team
Our customer wants to expand the IO port by performing I2C communication between the microcomputer (master) and TCA9539 (slave).
I have been asked by them about the behavior of the I / O port on the TCA9539 in the event of an I2C communication error.
For example, the data sheet describes the behavior when NACK is sent from TCA9539 to the microcomputer (master) as follows.
Is it okay to recognize that the I / O port is in a high impedance state when the TCA9539 sends a NACK to the master?
If not, please let me know what the I / O port will be in the above case.
Best Regards,
Y.Ottey