Dear TI support team,
We are facing on a serious issue some TPS65987D which we installed into our new product doesn't accept I2C access from HOST CPU.
We manufactured 34units of circuit board as prototype, and found that I2C error (NAK) happens in 5unit of these 34units.
Even though we have designed above board to configure ADCIN2 to tied to LDO_3V3 output via 100KOhm when we'd like sett it to 011b according to HW design guideline(slva888c.pdf) in which describes "Short ADCIN2 to LDO_3V3" in Table.1-2, it seems to cause problematic behavior AD Convertor logic fails to identify the slave-address setting.
On the other hand, We have also found that TI's EVM board was designed to configure resister divider for control 90% of LDO_3V3 (10KOhm and 100KOhm divider) in slvubo9a.pdf.
When we tried to change our board setting as same as EVM, we eventually have found I2C NAK failure have been resolved.
We would like to confirm and get correct setting information for ADCIN2 RIGHT NOW what register divider value should be applied to our MASS PRODUCTION soon. We need your quick response.
My best regards,
Fujitsu Yoshizaki
